Using Encryption to Secure a 7 Series FPGA Bitstream
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Feb 26, 2015 Using Encryption to Secure a 7 Series FPGA Bitstream encryption key can only be programmed onto the device through the JTAG port. The 7 series device performs the reverse operation, decrypting the incoming bitstream during configuration. The 7 series FPGA AES encryption logic uses a 256-bit encryption key. The on-chip AES decryption logic cannot be used for any purpose other than bitstream User ticket encryption types uses arcfour-hmac-md User ticket encryption types uses arcfour-hmac-md encryption, even though only AES encryption types have been specified in vas.conf--vas.conf entries: [libdefaults] default_realm = I.TS.HAL.CA.QSFT.